Lecture 25
After a round of demos today, we did a brief exrecise to look at the budgetary relationship in a datacenter between the cost of lower-power replacement...
Lecture 24
Today we wrapped up our look at large scale parallel processing, examining supercomputers for science and engineering, and warehouse scale computers...
Lecture 23
Today we took a rapid-paced tour through the realm of vector processors, including SIMD, SPMD, manycore, and GPU systems, dwelling a bit more on the...
Lecture 22
Demos today. Everyone is making good progress, given the circumstances of our times. We decided that the next demo will be Monday the 27th, and I will...
Lecture 21
Continuing our exploration of shared memory, today we saw why it’s not as simple as is often claimed. The idea of a programming abstraction in which...
Lecture 20
Today we went through an exercise of following a series of accesses to shared memory using an MSI coherence protocol, which is really the only way to...
Lecture 19
Wrapped up secondary storage, considering some new non-volatie memory technologies, and began to look at parallelism today. The in-class exercise is...
Lecture 18
Demos today, showing progress for most teams, and then we finished the section of the slides from last time on flash memory. So there are no new slides...
Lecture 17
Taking a closer look at the secondary storage landscape today. We are examining the recent progression of hard disk technology and where it is expected...
Lecture 16
Today we took a look at vitualization and virtualizability of architectures. We had a learnign experienc of dividing up into breakout rooms, with mixed...
Lecture 15
Starting our online meetings today. Please send me your questions from the reading either as plain text email or as a shared Google doc that I can at...
Lecture 14
We continuted our look at superscalar architecture today by extending instruction issue to include multithreading. We also took a quick look at predication...
Lecture 13
Continuing the theme of branch predictors, we saw how a G-Share predictor operates and then did an exercise to solidify a sense of how that works. We...
Lecture 12
Memory demos today, and then we did a quick review of local dyanmic branch predictors.
Slides are here
Lecture 11
Continuing our exploration of pipelining, we looked at scoreboarding, Tomasulo’s algorithms, and register update units. We then began to consider the...
Lecture 10
Continuing our theme of pipelining, we saw how control of a simple pipe, like in the simulator you are building, works in hardware as well as in the...
Lecture 9
We spent most of today on an exrcise to manually trace the operation of various cache organizations, gaining a better understanding of how a cache works....
Lecture 8
Today we went over associative caching, and looked at how the cache and memory will work in yoru simulation. A handout was provided to follow along with...
Lecture 7
ISA presentations today. A nice range of different approaches and specializations. Then we took a look at direct mapped cache, which should be a review...
Lecture 6
We concluded our look at the VLSI cost model, then saw how modern processor chips are mostly memory and circuitry that marshals data and instructions...
Lecture 5
We wrapped up the process of defining an instruction set today, and then began looking at VLSI technology and a model for the cost of chip fabrication....
Lecture 4
Continuing to look at the basic parameters associated with designing an architecture, teams worked on choosing the execution model, control flow, addressing...
Lecture 3
Today we began looking at the project architecture design and started forming teams. Bring the design worksheet again next time.
Slides are here
Lecture 2
We took a high-level walk through the landscape of computer architectures today. Next time we will begin looking at instruction set design and have some...
Lecture 1
Today we covered the syllabus, reading assignments, project, homework, and other course logistics. We will also took a look at architecture in a historical...