Today we went through an exercise of following a series of accesses to shared memory using an MSI coherence protocol, which is really the only way to grasp what is going on with one of these systems. As we saw, there is activity happening in every cache to check index and tag values for transactions, and multiple caches can be affected at once. We then saw a little bit about how this can be extended beyond a bus, using a technology such as QPI. Next time, we’ll take a deeper dive into the shared memory paradigm, and start looking at directory based coherence. 

Exercise handout is here

Slides are here