I teach the computer architecture sequence in the computer science department. CmpSci 335, Inside the Box, looks at how computers work, and how they can be interfaced to real world devices. CmpSci 535, Computer Architecture, is a traditional architecture course, based on the Hennessey and Paterson model. CmpSci 635, Modern Computer Architecture, is offered odd-year fall semesters and is run as a graduate reading seminar, considering a combination of currently hot topics in the field and a few classic papers that are essential for historical context. In the even-year fall semesters, I teach CmpSci 491IP, which is an undergraduate seminar on programming for the iOS operating system, using Swift. In addition, I sometimes sign up for a section of Honors 391AH, entitled Philosophy of Freedom, which explores the nature of human consciousness and free will. As noted under Service, I also teach computer science in grades 9 through 12 at a local high school.
Beyond classroom teaching, I have co-authored 28 introductory computer science texts, which have been used by more than a million students in learning how to program. Although I became a co-author on the series with Nell Dale in 1987, I consulted on the first edition of her first book, significantly influencing the approach. Upon publication in 1985, that text revolutionized the pedagogical approach for introductory computer science, became the market leader, and set a pattern for many other texts in that era. In 2019, I received the University Distinguished Teaching Award, and was named a Distinguished Member of the ACM. Read more
My overarching research interest has been in exploring novel hardware approaches and associated software issues for addressing specific problems in which enhanced performance is a key enabler.
My early (1985 - 1995) work involved leading joint development (UMass and Hughes Research Labs) of the world's first tightly-coupled, heterogeneous parallel processor. The Image Understanding Architecture combined a SIMD image processing layer with an SPMD symbol processing layer, and a MIMD layer for high level processing. An equivalent system today would combine a large GPU, a Xeon Phi, and a multicore into a 3D chip stack, with dual-ported memory layers between the processing dies, and a very dense interconnect. The second generation IUA was developed specifically for the Autonomous Land Vehicle program, and included an input subsystem to manage a sensor suite comparable to those on current self-driving vehicles.
Subsequently, I worked with Kathryn McKinley and Eliot Moss on the Scale compiler for heterogeneous sytems, which was eventually used for the TRIPS project at UT Austin. During that time, my student, Steve Dropsho, worked on a hybrid branch prediction system that automatically tuned its transition thresholds using online statistical analysis. Eliot and I then worked on a system called CoGenT, which used coordinated ISA and Micro-architectural description languages to generate compiler back-ends and timing simulators for architectural design space exploration. At the same time, I was also collaborating with Shin-Dug Kim at Yonsei University on dynamically adaptive caches, image processing engines, and flash memory architectures.
Most recently, I have been working with my student, Niall Emmart (now at NVIDIA) on accelerating multiprecision arithmetic (as used in cryptography and experimental math) using GPUs. Over my career, I have been a PI or Co-I on grants totaling over $24M, and have well over 100 refereed pubications, plus editing a dozen special issues and three monographs. As part of the CDER center, I have also taken various leadership roles in working to modernize the introductory computer science curriculum, by incorporating concepts of parallel and distributed computing as basic elements of computational probelm solving. Read more
Over the years I have served on the program or steering committees, or as a chair or vice chair of more than 75 conferences. I have also been involved with more than 25 panel sessions or tutorials at various conferences. I was the vice chair of the IEEE Technical Committee on Parallel Processing from 2003 - 2007, and have been on its executive or advisory committees since 2000. I led the TCPP charter revision task force in 2013, have been a member of the curriculum working group since 2010, and am currently leading the task force on Improving Diversity in TCPP Activities. I have been a member of the IEEE since 1976, and of the ACM since 1978. Since 1996, I have served continuously as a journal associate editor, including stints with JPDC, TPDS, and Parallel Computing.
I have been a chair or member of my department's curriculum committee for a total of 23 years, helping lead it through two major curriculum revisions, and the effort to create the BA program. I was also a member or chair of the new building committee from 1993 to 2000. Since joining the faculty, I have served on a wide range of department and college committees, and am now the college's representative to the Research Library Council.
From 1992 to 2000 I served as a technical advisor to the board of Amerinex Applied Imaging Inc., and from 1993 to 2000 I was a member of the board of ACSIOM, which was the department's technology transfer corporation. I have also consulted on five cases of patent litigation involving computer architecture.
Starting in 2000, with two years of training in developmentally-based pedagogical approaches, I helped found the Hartsbrook (Waldorf) High School, where I have taught computer science and other STEM courses since 2002. The more than 15 years of high school teaching experience has afforded me the opportunity to experimentally develop a curriculum that progresses developmentally from 9th trhough 12th grades, and which can be required for all students because it meets them appropriately at each level of instruction. The curriculum is now being disseminated through Waldorf education journals, and is being adopted at multiple schools. Read more