Index to Lecture 7

  1. Lecture 7 Outline
  2. 8 Stages of R4400 Pipeline
  3. Instruction First and Second
  4. Register File
  5. Execute
  6. Data First
  7. Data Second
  8. Data Tag Check
  9. Write Back
  10. Timing Diagram
  11. Branch Delay
  12. Load Delay
  13. Pipeline Faults
  14. Stalls and Slips
  15. Faults Occur in Unique Stages
  16. Exceptions
  17. Stalls
  18. Slips
  19. Stall Example
  20. Squashing After Interlock
  21. Trace of Interlock and Squash
  22. Effects of Interlock and Squash
  23. Fault Handling
  24. Fault Pipeline
  25. Fault Pipe Delay Examples
  26. Address Acceleration
  27. Address Prediction
  28. FPU Pipeline Overview
  29. FP Multiply and Divide
  30. FPU Functional Units
  31. Example FPU Schedules
  32. FPU Schedule Timing Diagram
  33. R4400 FPU Notes
  34. Another Pipeline: UltraSPARC1
  35. UltraSPARC Pipeline Stages
  36. Integer Stages
  37. Floating Point Stages
  38. Reasons for In-Order Issue
  39. Schedule Slip Impact on Performance
  40. Out-of-order Execution
  41. Functional Units
  42. Scalar vs. Superscalar Issue
  43. Adding An Integer ALU
  44. Branch Prediction
  45. Cached Prediction Bit Drawbacks
  46. Summary

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